|
Ma, Jingxiao, Hashemi, Soheil, Reda, Sherief.
"Approximate Logic Synthesis Using Boolean Matrix Factorization." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 1, 2022, pp. 15-28.
|
|
Nabavinejad, Seyed Morteza, Reda, Sherief, Ebrahimi, Masoumeh.
"Coordinated Batching and DVFS for DNN Inference on GPU Accelerators." IEEE Transactions on Parallel and Distributed Systems, vol. 33, no. 10, 2022, pp. 2496-2508.
|
|
Yuan, Zihao, Shukla, Prachi, Chetoui, Sofiane, Nemtzow, Sean, Reda, Sherief, Coskun, Ayse K.
"PACT: An Extensible Parallel Thermal Simulator for Emerging Integration and Cooling Technologies." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 4, 2022, pp. 1048-1061.
|
|
Reda, Sherief, Stok, Leon, Gaillardon, Pierre-Emmanuel.
"Guest Editors’ Introduction: The Resurgence of Open- Source EDA Technology." IEEE Design & Test, vol. 38, no. 2, 2021, pp. 5-7.
|
|
Dombroski, Amanda, Oakley, Kady, Arcadia, Christopher, Nouraei, Farnaz, Chen, Shui Ling, Rose, Christopher, Rubenstein, Brenda, Rosenstein, Jacob, Reda, Sherief, Kim, Eunsuk.
"Implementing parallel arithmetic via acetylation and its application to chemical image processing." Proceedings of the Royal Society A: Mathematical, Physical and Engineering Sciences, vol. 477, no. 2248, 2021.
|
|
Arcadia, Christopher E., Dombroski, Amanda, Oakley, Kady, Chen, Shui Ling, Tann, Hokchhay, Rose, Christopher, Kim, Eunsuk, Reda, Sherief, Rubenstein, Brenda M., Rosenstein, Jacob K.
"Leveraging autocatalytic reactions for chemical domain image classification." Chemical Science, vol. 12, no. 15, 2021, pp. 5464-5472.
|
|
Tann, Hokchhay, Zhao, Heng, Reda, Sherief.
"A Resource-Efficient Embedded Iris Recognition System Using Fully Convolutional Networks." ACM Journal on Emerging Technologies in Computing Systems, vol. 16, no. 1, 2020, pp. 1-23.
|
|
Scarabottolo, Ilaria, Ansaloni, Giovanni, Constantinides, George A., Pozzi, Laura, Reda, Sherief.
"Approximate Logic Synthesis: A Survey." Proceedings of the IEEE, vol. 108, no. 12, 2020, pp. 2195-2213.
|
|
Chetoui, Sofiane, Reda, Sherief.
"Coordinated Self-Tuning Thermal Management Controller for Mobile Devices." IEEE Design & Test, vol. 37, no. 5, 2020, pp. 34-41.
|
|
Rajan, Krishna, Hashemi, Soheil, Karpuzcu, Ulya, Doggett, Michael, Reda, Sherief.
"Dual-precision fixed-point arithmetic for low-power ray-triangle intersections." Computers & Graphics, vol. 87, 2020, pp. 72-79.
|
|
Kaplan, Fulya, Said, Mostafa, Reda, Sherief, Coskun, Ayse K.
"LoCool: Fighting Hot Spots Locally for Improving System Energy Efficiency." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, no. 4, 2020, pp. 895-908.
|
|
Arcadia CE, Kennedy E, Geiser J, Dombroski A, Oakley K, Chen SL, Sprague L, Ozmen M, Sello J, Weber PM, Reda S, Rose C, Kim E, Rubenstein BM, Rosenstein JK.
"Multicomponent molecular memory." Nature Communications, vol. 11, no. 1, 2020, pp. 691.
|
|
Rosenstein JK, Rose C, Reda S, Weber PM, Kim E, Sello J, Geiser J, Kennedy E, Arcadia C, Dombroski A, Oakley K, Chen SL, Tann H, Rubenstein BM.
"Principles of Information Storage in Small-Molecule Mixtures." IEEE Transactions on NanoBioscience, vol. 19, no. 3, 2020, pp. 378-384.
|
|
Approximate Circuits: Methodologies and CAD. edited by Sherief Reda, Mohamed Shafique, Springer International Publishing, 2019.
|
|
Nepal, Kumud, Hashemi, Soheil, Tann, Hokchhay, Bahar, R. Iris, Reda, Sherief.
"Automated High-Level Generation of Low-Power Approximate Computing Circuits." IEEE Transactions on Emerging Topics in Computing, vol. 7, no. 1, 2019, pp. 18-30.
|
|
Nabavinejad, Seyed Morteza, Hafez-Kolahi, Hassan, Reda, Sherief.
"Coordinated DVFS and Precision Control for Deep Neural Networks." IEEE Computer Architecture Letters, vol. 18, no. 2, 2019, pp. 136-140.
|
|
Azimi, Reza, Fox, Tyler, Gonzalez, Wendy, Reda, Sherief.
"Scale-Out vs Scale-Up." ACM Transactions on Modeling and Performance Evaluation of Computing Systems, vol. 3, no. 4, 2018, pp. 1-23.
|
|
Zhan, Xin, Azimi, Reza, Kanev, Svilen, Brooks, David, Reda, Sherief.
"CARB: A C-State Power Management Arbiter for Latency-Critical Workloads." IEEE Computer Architecture Letters, vol. 16, no. 1, 2017, pp. 6-9.
|
|
Reda, Sherief.
"Electronics: 3D integration advances computing." Nature, vol. 547, no. 7661, 2017, pp. 38-40.
|
|
Zhan, Xin, Reda, Sherief.
"Power Budgeting Techniques for Data Centers." IEEE Transactions on Computers, vol. 64, no. 8, 2015, pp. 2267-2278.
|
|
Nepal, Kumud, Li, Yueting, Bahar, R. Iris, Reda, Sherief.
"ABACUS: A technique for automated behavioral synthesis of approximate computing circuits." Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014, 2014.
|
|
Nepal, Kumud, Li, Yueting, Bahar, R. Iris, Reda, Sherief.
"ABACUS: A technique for automated behavioral synthesis of approximate computing circuits." Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014, 2014.
|
|
Ulusel, Onur, Nepal, Kumud, Bahar, R. Iris, Reda, Sherief.
"Fast Design Exploration for Performance, Power and Accuracy Tradeoffs in FPGA-Based Accelerators." ACM Trans. Reconfigurable Technol. Syst., vol. 7, no. 1, 2014, pp. 1-22.
|
|
Nowroz, Abdullah Nazma, Hu, Kangqiao, Koushanfar, Farinaz, Reda, Sherief.
"Novel Techniques for High-Sensitivity Hardware Trojan Detection Using Thermal and Power Maps." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 33, no. 12, 2014, pp. 1792-1805.
|
|
Azimi, Reza, Zhan, Xin, Reda, Sherief.
"Thermal-aware layout planning for heterogeneous datacenters." Proceedings of the 2014 international symposium on Low power electronics and design - ISLPED '14, 2014.
|
|
Hu, Kangqiao, Nowroz, Abdullah Nazma, Reda, Sherief, Koushanfar, Farinaz.
"High-Sensitivity Hardware Trojan Detection Using Multimodal Characterization." Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 2013.
|
|
Dev, Kapil, Woods, Gary, Reda, Sherief.
"High-throughput TSV testing and characterization for 3D integration using thermal mapping." Proceedings of the 50th Annual Design Automation Conference on - DAC '13, 2013.
|
|
Paterna, Francesco, Reda, Sherief.
"Mitigating Dark Silicon Problems Using Superlattice-based Thermoelectric Coolers." Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 2013.
|
|
Reda, Sherief, Nowroz, Abdullah N., Cochran, Ryan, Angelevski, Stefan.
"Post-silicon power mapping techniques for integrated circuits." Integration, the VLSI Journal, vol. 46, no. 1, 2013, pp. 69-79.
|
|
Dev, Kapil, Nowroz, Abdullah Nazma, Reda, Sherief.
"Power mapping and modeling of multi-core processors." International Symposium on Low Power Electronics and Design (ISLPED), 2013.
|
|
Nowroz, Abdullah Nazma, Woods, Gary, Reda, Sherief.
"Power Mapping of Integrated Circuits Using AC-Based Thermography." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 8, 2013, pp. 1398-1409.
|
|
Zhan, Xin, Reda, Sherief.
"Techniques for energy-efficient power budgeting in data centers." Proceedings of the 50th Annual Design Automation Conference on - DAC '13, 2013.
|
|
Hankendi, Can, Reda, Sherief, Coskun, Ayse K.
"vCap: Adaptive power capping for virtualized servers." International Symposium on Low Power Electronics and Design (ISLPED), 2013.
|
|
Reda, Sherief, Cochran, Ryan, Coskun, Ayse K.
"Adaptive Power Capping for Servers with Multithreaded Workloads." IEEE Micro, vol. 32, no. 5, 2012, pp. 64-75.
|
|
Nepal, Kumud, Ulusel, Onur, Bahar, R. Iris, Reda, Sherief.
"Fast Multi-Objective Algorithmic Design Co-Exploration for FPGA-based Accelerators." 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines, 2012.
|
|
Reda, Sherief, Nowroz, Abdullah.
"Power Modeling and Characterization of Computing Devices: A Survey." FNT in Electronic Design Automation, vol. 6, no. 2, 2012, pp. 121-216.
|
|
Kudithipudi, Dhireesha, Coskun, Ayse, Reda, Sherief, Qiu, Qinru.
"Temperature-aware computing: Achievements and remaining challenges." 2012 International Green Computing Conference (IGCC), 2012.
|
|
Cochran, Ryan, Reda, Sherief.
"Thermal prediction and adaptive control through workload phase detection." ACM Transactions on Design Automation of Electronic Systems, vol. 18, no. 1, 2012, pp. 1-19.
|
|
Cochran, Ryan, Hankendi, Can, Coskun, Ayse, Reda, Sherief.
"Identifying the optimal energy-efficient operating points of parallel workloads." 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2011.
|
|
Nowroz, Abdullah Nazma, Woods, Gary, Reda, Sherief.
"Improved post-silicon power modeling using AC lock-in techniques." Proceedings of the 48th Design Automation Conference on - DAC '11, 2011.
|
|
Reda, Sherief, Cochran, Ryan, Nowroz, Abdullah Nazma.
"Improved Thermal Tracking for Processors Using Hard and Soft Sensor Allocation Techniques." IEEE Transactions on Computers, vol. 60, no. 6, 2011, pp. 841-851.
|
|
Cochran, Ryan, Hankendi, Can, Coskun, Ayse K., Reda, Sherief.
"Pack & Cap." Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture - MICRO-44 '11, 2011.
|
|
Nowroz, Abdullah Nazma, Reda, Sherief.
"Thermal and power characterization of field-programmable gate arrays." Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11, 2011.
|
|
Reda, Sherief.
"Thermal and Power Characterization of Real Computing Devices." IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 1, no. 2, 2011, pp. 76-87.
|
|
Reda, S, Nassif, S R.
"Accurate Spatial Estimation and Decomposition Techniques for Variability Characterization." IEEE Transactions on Semiconductor Manufacturing, vol. 23, no. 3, 2010, pp. 345-357.
|
|
Cochran, Ryan, Reda, Sherief.
"Consistent runtime thermal prediction and control through workload phase detection." Proceedings of the 47th Design Automation Conference on - DAC '10, 2010.
|
|
Khan, Nauman H., Reda, Sherief, Hassoun, Soha.
"Early estimation of TSV area for power delivery in 3-D integrated circuits." 2010 IEEE International 3D Systems Integration Conference (3DIC), 2010.
|
|
Qiu, Jinhai, Reda, Sherief, Hassoun, Soha.
"Fast, accurate a priori routing delay estimation." Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction - SLIP '10, 2010.
|
|
Cochran, Ryan, Nowroz, Abdullah Nama, Reda, Sherief.
"Post-silicon power characterization using thermal infrared emissions." Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design - ISLPED '10, 2010.
|
|
Nowroz, Abdullah Nazma, Cochran, Ryan, Reda, Sherief.
"Thermal monitoring of real processors." Proceedings of the 47th Design Automation Conference on - DAC '10, 2010.
|
|
Reda, Sherief.
"What is DNA array?." ACM SIGDA Newsletter, vol. 40, no. 6, 2010, pp. 1-1.
|
|
Reda, S., Nassif, S.R.
"Analyzing the impact of process variations on parametric measurements: Novel models and applications." 2009 Design, Automation & Test in Europe Conference & Exhibition, 2009.
|
|
Kadin, Michael, Reda, Sherief, Uht, Augustus.
"Central vs. distributed dynamic thermal management for multi-core processors." Proceedings of the 19th ACM Great Lakes symposium on VLSI - GLSVLSI '09, 2009.
|
|
Le, Roto, Reda, Sherief, Bahar, R. Iris.
"High-performance, cost-effective heterogeneous 3D FPGA architectures." Proceedings of the 19th ACM Great Lakes symposium on VLSI - GLSVLSI '09, 2009.
|
|
Le, Roto, Reda, Sherief, Bahar, Iris.
"High-performance, cost-effective heterogeneous 3D FPGA architectures." Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '09, 2009.
|
|
Reda, S., Smith, G., Smith, L.
"Maximizing the Functional Yield of Wafer-to-Wafer 3-D Integration." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 17, no. 9, 2009, pp. 1357-1362.
|
|
Reda, Sherief, Si, Aung, Bahar, R. Iris.
"Reducing the leakage and timing variability of 2D ICcs using 3D ICs." Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design - ISLPED '09, 2009.
|
|
Cochran, Ryan, Reda, Sherief.
"Spectral techniques for high-resolution thermal characterization with limited sensor data." Proceedings of the 46th Annual Design Automation Conference on ZZZ - DAC '09, 2009.
|
|
Reda, Sherief.
"Using circuit structural analysis techniques for networks in systems biology." Proceedings of the 11th international workshop on System level interconnect prediction - SLIP '09, 2009.
|
|
Kadin, Michael, Reda, Sherief.
"Frequency and voltage planning for multi-core processors under thermal constraints." 2008 IEEE International Conference on Computer Design, 2008.
|
|
Kadin, Michael, Reda, Sherief.
"Frequency planning for multi-core processors under thermal constraints." Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08, 2008.
|
|
Ferri, Cesare, Reda, Sherief, Bahar, R. Iris.
"Parametric yield management for 3D ICs." JETC, vol. 4, no. 4, 2008, pp. 1-22.
|
|
Hargreaves, Brendan, Hult, Henrik, Reda, Sherief.
"Within-die process variations: How accurately can they be statistically modeled?." 2008 Asia and South Pacific Design Automation Conference, 2008.
|
|
Meisner, David, Reda, Sherief.
"Hardware libraries: An architecture for economic acceleration in soft multi-core environments." 2007 25th International Conference on Computer Design, 2007.
|
|
Kahng, Andrew B., Reda, Sherief, Sharma, Puneet.
"On-Line Adjustable Buffering for Runtime Power Reduction." 8th International Symposium on Quality Electronic Design (ISQED'07), 2007.
|
|
Ferri, Cesare, Sherief Reda, None, R. Iris Bahar, None.
"Strategies for improving the parametric yield and profits of 3D ICs." 2007 IEEE/ACM International Conference on Computer-Aided Design, 2007.
|
|
Gi-Joon Nam, None, Reda, S., Alpert, C.J., Villarrubia, P.G., Kahng, A.B.
"A fast hierarchical quadratic placement algorithm." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 4, 2006, pp. 678-691.
|
|
Kahng, Andrew B., Reda, Sherief.
"A tale of two nets." Proceedings of the international workshop on System-level interconnect prediction - SLIP'06, 2006.
|
|
Kahng, A.B., Mandoiu, I.I., Reda, S., Xu Xu, None, Zelikovsky, A.Z.
"Computer-Aided Optimization of DNA Array Design and Manufacturing." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 2, 2006, pp. 305-320.
|
|
Reda, Sherief, Chowdhary, Amit.
"Effective linear programming based placement methods." Proceedings of the 2006 international symposium on Physical design - ISPD '06, 2006.
|
|
Kahng, A.B., Reda, S.
"New and improved BIST diagnosis methods from combinatorial Group testing theory." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 3, 2006, pp. 533-543.
|
|
Kahng, A.B., Reda, S.
"Wirelength minimization for min-cut placements via placement feedback." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 7, 2006, pp. 1301-1312.
|
|
Kahng, Andrew B., Reda, Sherief.
"Zero-Change Netlist Transformations: A New Technique for Placement Benchmarking." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 12, 2006, pp. 2806-2819.
|
|
Alpert, Charles, Kahng, Andrew, Nam, Gi-Joon, Reda, Sherief, Villarrubia, Paul.
"A semi-persistent clustering technique for VLSI circuit placement." Proceedings of the 2005 international symposium on physical design - ISPD '05, 2005.
|
|
Kahng, Andrew B., Reda, Sherief, Wang, Qinke.
"APlace." Proceedings of the 2005 international symposium on physical design - ISPD '05, 2005.
|
|
Kahng, A.B., Reda, S., Wang, Q.
"Architecture and details of a high quality, large-scale analytical placer." ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005., 2005.
|
|
Kahng, Andrew B., Reda, Sherief.
"Evaluation of placer suboptimality via zero-change netlist transformations." Proceedings of the 2005 international symposium on physical design - ISPD '05, 2005.
|
|
Kahng, A.B., Reda, S.
"Intrinsic shortest path length: a new, accurate a priori wirelength estimator." ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005., 2005.
|
|
Yongseok Cheon, None, Pei-Hsin Ho, None, Kahng, A.B., Reda, S., Qinke Wang, None.
"Power-aware placement." Proceedings. 42nd Design Automation Conference, 2005., 2005.
|
|
Cheon, Yongseok, Ho, Pei-Hsin, Kahng, Andrew B., Reda, Sherief, Wang, Qinke.
"Power-aware placement." Proceedings of the 42nd annual conference on Design automation - DAC '05, 2005.
|
|
Kahng, A.B., Markov, I.L., Reda, S.
"Boosting: min-cut placement with improved signal delay." Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004.
|
|
Kahng, A.B., Reda, S.
"Combinatorial group testing methods for the BIST diagnosis problem." ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753), 2004.
|
|
Kahng, Andrew B, Reda, Sherief.
"Match twice and stitch: a new TSP tour construction heuristic." Operations Research Letters, vol. 32, no. 6, 2004, pp. 499-509.
|
|
Kahng, Andrew B., Markov, Igor L., Reda, Sherief.
"On legalization of row-based placements." Proceedins of the 14th ACM Great Lakes symposium on VLSI - GLSVLSI '04, 2004.
|
|
Kahng, Andrew B., Reda, Sherief.
"Placement feedback." Proceedings of the 41st annual conference on Design automation - DAC '04, 2004.
|
|
Kahng, A.B., Reda, S.
"Reticle floorplanning with guaranteed yield for multi-project wafers." IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings., 2004.
|
|
Kahng, Andrew B., Măndoiu, Ion I., Pevzner, Pavel A., Reda, Sherief, Zelikovsky, Alexander Z.
"Scalable Heuristics for Design of DNA Probe Arrays." Journal of Computational Biology, vol. 11, no. 2-3, 2004, pp. 429-447.
|
